1. Technical Field
The present invention relates to a mounting structure in which a component such as a flexible printed circuit, an IC, or the like is mounted on a substrate, and to an electro optical device equipped with the same.
2. Related Art
A pixel is formed at a position corresponding to each intersection point of a number of data lines and a number of scanning lines, and a predetermined signal is supplied to each pixel via the data lines and the scanning lines to drive each pixel in an active matrix liquid crystal device, an organic electro-luminescence display device, and an electro optical device such as a plasma display. Accordingly, in the electro optical device, a structure is employed in which a component such as a driving IC, a flexible printed circuit, or the like is mounted on a substrate for holding an electro optical material (for example, see JP-A-2003-66480).
When mounting such a component, as shown in FIG. 12A, when perpendicular two directions on a substrate surface are Second direction and first direction, in general, a plurality of wirings 181 that extends in the First direction to align in parallel with the Second direction are formed so as to reach a mounting area 10g of the component are formed on a substrate 10h, and substrate-side terminals 182 are formed on the wirings 181 in the mounting area 10g. On the other hand, for example, at the side of a flexible printed circuit 15, a plurality of component-side terminals 156 are formed, and as shown in FIG. 12B, when the flexible printed circuit 15 is overlapped with the substrate 10h via an anisotropic conductive film, each of the plurality of component-side terminals 156 is overlapped with corresponding one of the plurality of the substrate-side terminals 182 in plan view, and is electrically connected thereto. Herein, the width size of the substrate-side terminal 182 is same as that of the wiring pattern 181.
As a structure for mounting a connector or the like as the component on the substrate, the structure shown in FIG. 12C has been proposed (see JP-A-2006-73536).
In the mounting structure shown in FIG. 12C, a plurality of substrate-side first wirings 191 that extend in the First direction to align in the Second direction and that reach a mounting area 10j of the component, and a plurality of substrate-side second wirings 192 each of which passes between corresponding two of the substrate-side first wirings 191 adjacent in the Second direction to extend in the First direction and that reach the mounting area 10j are formed on a substrate 10i. Further, a plurality of substrate-side first terminals 196 each of which is arranged on corresponding one of the plurality of the substrate-side first wirings 191 at a side to which the substrate-side first wirings 191 and the substrata side second wring patterns 192 are extended, the plurality of substrate-side first terminals 196 being aligned in the Second direction, are formed in the mounting area 10j, and a plurality of substrate-side second terminals 197 each of which is arranged on a portion of corresponding one of the plurality of substrate-side second wirings 192, the portion being provided where the substrate-side second wiring pattern 192 is passed through between corresponding two of the component-side first terminals 196 adjacent to the substrate-side second wiring pattern 192 in the Second direction, the plurality of substrate-side second terminals 197 being aligned in the Second direction, are formed in the mounting area 10j. 
However, in the structure shown in FIGS. 12A, 12B, when the number of the wirings 181 and the number of the substrate-side terminals 182 is increased without extending the mounting area 10g in the Second direction, it is necessary to narrow the pitch of the wirings 181 and the substrate-side terminals 182, or to decrease the width size of the wirings 181 and the substrate-side terminals 182. When the countermeasure is executed, there is a problem in that, for example, a shortcut between adjacent two terminals or an opening between the substrate-side terminal 182 and the component-side terminal 181 occurs when mounting.
Further, in the structure shown in FIG. 12C, the width size of the substrate-side second wiring pattern 192 is partially decreased by the extended amount of the width size of the substrate-side first terminal 196 than that of the substrate-side first wiring pattern 191 in order to assure a sufficient gap between the substrate-side first terminal 196 and the substrate-side second wiring pattern 192. Consequently, when the number of the wirings and the number of the substrate-side terminals is increased without extending the mounting area 10j in the Second direction, there is a problem in that it can not be avoided to decrease the width size of the substrate-side second wirings 192, which increases the wiring resistance.